From multi-clock constraints to multi-rate GALS executives - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Reports (Research Report) Year : 2006

From multi-clock constraints to multi-rate GALS executives

Abstract

We define a method for synthesizing the asynchronous executives that are driving the synchronous modules of a globally synchronous, locally synchronous (GALS) system. The technique takes as input high-level synchronization constraints, under the form of multi-clock modular synchronous reactive (\SR) specifications. For each synchronous module, our technique produces a multi-rate executive that drives the communication and clock of the component using a mixed static/dynamic scheduling policy. The resulting GALS system is predictable and functionally correct with respect to the initial synchronous specification. The approach is based on the theory of weakly endochronous (\WE) systems, and on a notion of atomic reaction which allow us to exploit the concurrency of the specification to improve the communication efficiency of the executives.
Fichier principal
Vignette du fichier
RR-6021.pdf (350.46 Ko) Télécharger le fichier
Origin : Files produced by the author(s)

Dates and versions

inria-00114032 , version 1 (17-11-2006)
inria-00114032 , version 2 (17-11-2006)

Identifiers

  • HAL Id : inria-00114032 , version 2

Cite

Dumitru Potop-Butucaru, Yves Sorel, Robert de Simone. From multi-clock constraints to multi-rate GALS executives. [Research Report] RR-6021, INRIA. 2006, pp.25. ⟨inria-00114032v2⟩
127 View
106 Download

Share

Gmail Facebook Twitter LinkedIn More