A Hierarchical Model of Control Logic for Simplifying Complex Networks Protocol Design - Inria - Institut national de recherche en sciences et technologies du numérique Accéder directement au contenu
Communication Dans Un Congrès Année : 2021

A Hierarchical Model of Control Logic for Simplifying Complex Networks Protocol Design

Résumé

With the increase of network protocols complexity, the finite state machine model commonly used in hardware design is difficult to directly describe and manage complex protocol control logic. The hierarchical approach can simplify the design and implementation of complex logic. However, the control logic of the protocol is a whole, and how to divide the control logic of the protocol hierarchically is a problem that needs to be solved urgently. Therefore, by analyzing the characteristics of complex protocol control logic, this paper proposes the DoubleDeck model. This model divides the state in protocol processing into a global state perceivable by the protocol peer and a local state invisible to the outside. Next, we established a prototype system of the time synchronization protocol (AS6802) on the FPGA array based on the DoubleDeck model, which effectively verified the feasibility of the model.
Fichier principal
Vignette du fichier
511910_1_En_16_Chapter.pdf (11.91 Mo) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)

Dates et versions

hal-03768758 , version 1 (04-09-2022)

Licence

Paternité

Identifiants

Citer

Yi Yang, Wei Quan, Jinli Yan, Lu Tang, Zhigang Sun. A Hierarchical Model of Control Logic for Simplifying Complex Networks Protocol Design. 17th IFIP International Conference on Network and Parallel Computing (NPC), Sep 2020, Zhengzhou, China. pp.182-187, ⟨10.1007/978-3-030-79478-1_16⟩. ⟨hal-03768758⟩
16 Consultations
1 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More