Taming data locality for task scheduling under memory constraint in runtime systems - Inria - Institut national de recherche en sciences et technologies du numérique
Journal Articles Future Generation Computer Systems Year : 2023

Taming data locality for task scheduling under memory constraint in runtime systems

Ordonnancement sous contrainte mémoire en domptant la localité des données dans un modèle de programmation à base de tâches

Abstract

A now-classical way of meeting the increasing demand for computing speed by HPC applications is the use of GPUs and/or other accelerators. Such accelerators have their own memory, which is usually quite limited, and are connected to the main memory through a bus with bounded bandwidth. Thus, particular care should be devoted to data locality in order to avoid unnecessary data movements. Task-based runtime schedulers have emerged as a convenient and efficient way to use such heterogeneous platforms. When processing an application, the scheduler has the knowledge of all tasks available for processing on a GPU, as well as their input data dependencies. Hence, it is possible to produce a tasks processing order aiming at reducing the total processing time through three objectives: minimizing data transfers, overlapping transfers and computation and optimizing the eviction of previously-loaded data. In this paper, we focus on how to schedule tasks that share some of their input data (but are otherwise independent) on a single GPU. We provide a formal model of the problem, exhibit an optimal eviction strategy, and show that ordering tasks to minimize data movement is NP-complete. We review and adapt existing ordering strategies to this problem, and propose a new one based on task aggregation. We prove that the underlying problem of this new strategy is NP-complete, and prove the reasonable complexity of our proposed heuristic. These strategies have been implemented in the StarPU runtime system. We present their performance on tasks from tiled 2D, 3D matrix products, Cholesky factorization, randomized task order, randomized data pairs from the 2D matrix product as well as a sparse matrix product. We introduce a visual way to understand these performance and lower bounds on the number of data loads for the 2D and 3D matrix products. Our experiments demonstrate that using our new strategy together with the optimal eviction policy reduces the amount of data movement as well as the total processing time.
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Dates and versions

hal-03623220 , version 1 (29-03-2022)
hal-03623220 , version 2 (29-01-2023)

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Maxime Gonthier, Loris Marchal, Samuel Thibault. Taming data locality for task scheduling under memory constraint in runtime systems. Future Generation Computer Systems, In press, 143, pp.305-321. ⟨10.1016/j.future.2023.01.024⟩. ⟨hal-03623220v2⟩
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