An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Conference Papers Year : 2017

An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm

Zhenxue He
  • Function : Author
  • PersonId : 1027958
Guangjun Qin
  • Function : Author
Limin Xiao
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  • PersonId : 1006934
Fei Gu
  • Function : Author
Zhisheng Huo
  • Function : Author
Li Ruan
  • Function : Author
Haitao Wang
Xiang Wang
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  • PersonId : 774351
  • IdRef : 195367588

Abstract

The bottleneck of integrated circuit design could potentially be alleviated by using Reed-Muller (RM) logic circuits due to their remarkable superiority in power, area and testability. In this paper, we propose a Novel Binary Differential Evolution (DE) algorithm (NBDE) to solve the discrete binary-encoded combination optimization problem. Moreover, based on the NBDE, we propose an Efficient Polarity Optimization Approach (EPOA) for Fixed Polarity RM (FPRM) logic circuits, which uses the NBDE to search the best polarity under a performance constraint. To the best of our knowledge, we are the first to use DE to optimize RM circuits. The experimental results on 24 MCNC benchmark circuits show the effectiveness and superiority of EPOA.
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hal-01705436 , version 1 (09-02-2018)

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Zhenxue He, Guangjun Qin, Limin Xiao, Fei Gu, Zhisheng Huo, et al.. An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm. 14th IFIP International Conference on Network and Parallel Computing (NPC), Oct 2017, Hefei, China. pp.118-121, ⟨10.1007/978-3-319-68210-5_11⟩. ⟨hal-01705436⟩
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