Low Power Front-End Architecture dedicated to the Multistandard Simultaneous Reception - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Journal Articles International Journal of Microwave and Wireless Technologies Year : 2010

Low Power Front-End Architecture dedicated to the Multistandard Simultaneous Reception

Abstract

In this paper, we address the architecture of multistandard simultaneous reception receivers and we aim to reduce the complexity and the power consumption of the analog front-end. To this end we propose an architecture using the double orthogonal translation technique in order to multiplex two signals received on different frequency bands. A study case concerning the simultaneous reception of 802.11g and UMTS signals is developed in this article. Theoretical and simulation results show that this type of multiplexing does not significantly influence the evolution of the signal to noise ratio of the signals. In the same time a 30% reduction of the power consumption is expected as well as a significant reduction of the complexity.
No file

Dates and versions

inria-00527991 , version 1 (20-10-2010)

Identifiers

  • HAL Id : inria-00527991 , version 1

Cite

Ioan Burciu, Guillaume Villemaud, Jacques Verdier, Matthieu Gautier. Low Power Front-End Architecture dedicated to the Multistandard Simultaneous Reception. International Journal of Microwave and Wireless Technologies, 2010. ⟨inria-00527991⟩
529 View
0 Download

Share

Gmail Facebook X LinkedIn More