A Fault-Tolerant Layer For Dynamically Reconfigurable Multi-Processor System-On-Chip - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Conference Papers Year : 2009
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inria-00446946 , version 1 (13-01-2010)

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  • HAL Id : inria-00446946 , version 1

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Hung-Manh Pham, Sébastien Pillement, Didier Demigny. A Fault-Tolerant Layer For Dynamically Reconfigurable Multi-Processor System-On-Chip. International Conference on ReConFigurable Computing and FPGAs, ReConFig'09, Dec 2009, Cancun, Mexico. ⟨inria-00446946⟩
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