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Reports (Research Report) Year : 2008

Virtual prototyping AADL architectures in a polychronous model of computation

Abstract

While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both synchronous and asynchronous worlds by considering locally synchronous processes composed in a globally asynchronous way to form so called GALS architectures. In the avionics domain, for instance, the Architecture Analysis and Design Language (AADL) may be used to describe both the hardware and software architecture of an application at system-level. Yet, a synchronous design formalism might be preferred to model and validate each of the critical components of the architecture in isolation. In this paper, we illustrate the use of the polychronous (multi-clocked synchronous) paradigm to model partially asynchronous applications. The specification formalism SIGNAL is used to describe real-world avionic applications using concepts of Integrated Modular Avionics (IMA). We show how an AADL architecture can be automatically translated into a synchronous model in SIGNAL using these modeling concepts. We present a case study on the design of generic system architecture. The approach is being implemented in the framework of the ANR project TOPCASED.
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Dates and versions

inria-00265059 , version 1 (18-03-2008)
inria-00265059 , version 2 (18-03-2008)
inria-00265059 , version 3 (31-03-2008)

Identifiers

  • HAL Id : inria-00265059 , version 3

Cite

Yue Ma, Jean-Pierre Talpin, Thierry Gautier. Virtual prototyping AADL architectures in a polychronous model of computation. [Research Report] RR-6479, INRIA. 2008, pp.25. ⟨inria-00265059v3⟩
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