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Reports (Research Report) Year : 2004

FPGA Implementation of a Recently Published Signature Scheme

Nicolas Sendrier
Arnaud Tisserand
Gilles Villard

Abstract

An algorithm producing cryptographic digital signatures less than 100 bits long with a security level matching nowadays standards has been recently proposed by Courtois, Finiasz, and Sendrier. This scheme is based on error correcting codes and consists in generating a large number of instances of a decoding problem until one of them is solved (about 9!=362880 attempts are needed). A careful software implementation requires more than one minute on a 2GHz Pentium 4 for signing. We propose a first hardware architecture which allows to sign a document in 0.86 second on an XCV300E-7 FPGA, hence making the algorithm practical.
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Dates and versions

inria-00077045 , version 1 (29-05-2006)

Identifiers

  • HAL Id : inria-00077045 , version 1

Cite

Jean-Luc Beuchat, Nicolas Sendrier, Arnaud Tisserand, Gilles Villard. FPGA Implementation of a Recently Published Signature Scheme. [Research Report] RR-5158, LIP RR-2004-14, INRIA, LIP. 2004. ⟨inria-00077045⟩
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