Scheduling Block-Cyclic Array Redistribution - Inria - Institut national de recherche en sciences et technologies du numérique
Rapport (Rapport De Recherche) Année : 1997

Scheduling Block-Cyclic Array Redistribution

Résumé

This article is devoted to the run-time redistribution of arrays that are distributed in a block-cyclic fashion over a multidimensional processor grid. While previous studies have concentrated on efficiently generating the communication messages to be exchanged by the processors involved in the redistribution, we focus on the {\em scheduling} of those messages: how to organize the message exchanges into «structured» communication steps that minimize contention. We build upon results of Walker and Otto, who solved a particular instance of the problem, and we derive an optimal scheduling for the most general case, namely, moving from a {\tt CYCLIC(r)} distribution on a $P$-processor grid to a {\tt CYCLIC(s)} distribution on a $Q$-processor grid, for {\em arbitrary} values of the redistribution parameters $P$, $Q$, $r$, and $s$.

Domaines

Autre [cs.OH]
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Dates et versions

inria-00073573 , version 1 (24-05-2006)

Identifiants

  • HAL Id : inria-00073573 , version 1

Citer

Frédéric Desprez, Jack Dongarra, Antoine Petitet, Cyril Randriamaro, Yves Robert. Scheduling Block-Cyclic Array Redistribution. [Research Report] RR-3117, INRIA. 1997. ⟨inria-00073573⟩
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