Synthesis of Data-Flow Interfaces for Regular Parallel Programs - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Reports (Research Report) Year : 1999

Synthesis of Data-Flow Interfaces for Regular Parallel Programs

Patrice Quinton
  • Function : Author
  • PersonId : 833432
Tanguy Risset

Abstract

We present a method for generating an interface between an architecture executing a regular program and a host processor, during an hardware-software co-design process. The interface is generated by static analysis of a single assignment Alfa program and of its scheduling. This method is implement- ed in the MMAlpha design environment, and was experimented on a H261 image coder.

Domains

Other [cs.OH]
Fichier principal
Vignette du fichier
RR-3760.pdf (120.28 Ko) Télécharger le fichier
Loading...

Dates and versions

inria-00072902 , version 1 (24-05-2006)

Identifiers

  • HAL Id : inria-00072902 , version 1

Cite

Franck Bardoult, Patrice Quinton, Sanjay Rajopadhye, Tanguy Risset. Synthesis of Data-Flow Interfaces for Regular Parallel Programs. [Research Report] RR-3760, INRIA. 1999. ⟨inria-00072902⟩
94 View
160 Download

Share

Gmail Facebook X LinkedIn More