Flexible Issue Slot Assignment for VLIW Architectures - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Reports (Research Report) Year : 1999

Flexible Issue Slot Assignment for VLIW Architectures

Christine Eisenbeis
  • Function : Author
  • PersonId : 833430
Erven Rohou

Abstract

Programming specialized processors requires solving complex resource constrain- ts related to the underlying architecture. Although one instruction of the Philips TriMedia VLIW processor can issue five parallel operations, each category of operations can only be allocated to a subset of the five available slots. In this report we show how these restrictions can be translated into constraints based on reservation tables. This allows us to directly apply all classical algorithms for code generation and optimizatio- n. An important byproduct is that dynamic processes, such as «on the fly» code generation, are made tractable, even though resource constraints are strongly static.

Domains

Other [cs.OH]
Fichier principal
Vignette du fichier
RR-3784.pdf (268.76 Ko) Télécharger le fichier

Dates and versions

inria-00072876 , version 1 (24-05-2006)

Identifiers

  • HAL Id : inria-00072876 , version 1

Cite

Zbigniew Chamski, Christine Eisenbeis, Erven Rohou. Flexible Issue Slot Assignment for VLIW Architectures. [Research Report] RR-3784, INRIA. 1999. ⟨inria-00072876⟩
194 View
124 Download

Share

Gmail Facebook X LinkedIn More