Extending Polygeist to Generate OpenMP SIMD and GPU MLIR Code - Inria - Institut national de recherche en sciences et technologies du numérique
Communication Dans Un Congrès Année : 2025

Extending Polygeist to Generate OpenMP SIMD and GPU MLIR Code

Résumé

The state-of-the-art source-to-source polyhedral schedulers annotate loops that can be vectorized with directives, which are merely recommendations to the compiler. However, standard compiler autovectorizers may fail to vectorize them because of the complexity of the loops structure or nested statements in the restructured code. The Polygeist compilation framework can generate polyhedral optimized (tiling and parallel loops) MLIR code, but it neither annotates the loops with vectorization directives nor auto-generates the vectorized code. In this paper we describe a proposal to extend Polygeist to generate OpenMP SIMD MLIR code for vector loops. We also want to further extend the code generation process to support GPU MLIR code thereby targeting accelerated architectures.
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Dates et versions

hal-04711965 , version 1 (27-09-2024)

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  • HAL Id : hal-04711965 , version 1

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Arun Thangamani, Vincent Loechner, Stéphane Genaud. Extending Polygeist to Generate OpenMP SIMD and GPU MLIR Code. 30th International European Conference on Parallel and Distributed Computing - PhD Symposium, Aug 2024, Madrid, Spain. ⟨hal-04711965⟩
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