HTAG-eNN: Hardening Technique with AND Gates for Embedded Neural Networks - Inria - Institut national de recherche en sciences et technologies du numérique
Communication Dans Un Congrès Année : 2024

HTAG-eNN: Hardening Technique with AND Gates for Embedded Neural Networks

Résumé

Embedded Neural Networks (NNs) face significant challenges due to Single-Event Upsets (SEUs), compromising their reliabil- ity. To address this challenge, previous works study SEU layers sensitivity of AI models. Contrary to these techniques, remaining at high level, we propose a more accurate analysis, highlighting that, except for the last layer, faults transitioning from 0 to 1 sig- nificantly impact classification outcomes. Based on this specific behavior, we propose a simple hardware block able to detect and mitigate the SEU impact. Obtained results show that HTAG protec- tion efficiency is near 96.85% for the LeNet-5 CNN inference model, suitable for an embedded system. This result can be improved with other protection methods for the classification layer. Additionally, it significantly reduces area overhead and critical path compared to existing approaches.
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Dates et versions

hal-04689194 , version 1 (15-10-2024)

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Identifiants

  • HAL Id : hal-04689194 , version 1

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Wilfread Guilleme, Angeliki Kritikakou, Youri Helen, Cédric Killian, Daniel Chillet. HTAG-eNN: Hardening Technique with AND Gates for Embedded Neural Networks. DAC 2024 - IEEE/ACM Design Automation Conference, Jun 2024, San Francisco, United States. ⟨hal-04689194⟩
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