Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing Cells - Inria - Institut national de recherche en sciences et technologies du numérique
Communication Dans Un Congrès Année : 2023

Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing Cells

Emad Arasteh
  • Fonction : Auteur
  • PersonId : 1359661
Rainer Dömer
  • Fonction : Auteur
  • PersonId : 1001385

Résumé

Modern processors experience memory contention when the speed of their computational units exceeds the rate at which data can be accessed in memory. This phenomenon is well known as the memory bottleneck and is a great challenge in computer engineering. In order to mitigate the memory bottleneck in classic multi-core architectures, a scalable parallel computing platform called Grid of Processing Cells (GPC) has been proposed. To evaluate its effectiveness, we model the GPC using SystemC TLM-2.0, with a focus on memory contention. As an example, we parallelize an APNG encoder application and map it to the GPC and compare its performance to traditional shared memory processors. Our experimental results show improved execution times on the GPC due to a large decrease in memory contention.
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Dates et versions

hal-04645301 , version 1 (11-07-2024)

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Vivek Govindasamy, Emad Arasteh, Rainer Dömer. Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing Cells. 7th International Embedded Systems Symposium (IESS), Nov 2022, Lippstadt, Germany. pp.101-112, ⟨10.1007/978-3-031-34214-1_9⟩. ⟨hal-04645301⟩
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