Single-Chip Motes and SRAM PUF: Feasibility Study - Inria - Institut national de recherche en sciences et technologies du numérique
Communication Dans Un Congrès Année : 2024

Single-Chip Motes and SRAM PUF: Feasibility Study

Résumé

Physically unclonable functions (PUFs) are used as low-cost cryptographic primitives that extract key material from manufacturing variabilities of a device. All microcontrollers have on-chip SRAM; the power-up state of SRAM cells provides one way of obtaining a random output. However, not every SRAM can be used as a PUF. SRAM PUFs need to fulfill certain requirements: randomness, reliability, unpredictability and uniqueness. In this paper, we study whether the SRAM present on a novel class of devices, single-chip motes, satisfies these requirements. Single-chip motes are wireless sensor nodes that integrate computation, communication, power and sensing on a single chip. We analyze the SRAM characteristics on nine different single-chip motes to understand the potential of using these integrated SRAMs as PUF. Our experiments on 55 kB SRAM for each mote indicate that SRAM start-up values satisfy the requirements. Therefore, these embedded memories can be used for different PUF applications, including secret key extraction and true random number generation.
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Dates et versions

hal-04589272 , version 1 (27-05-2024)

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  • HAL Id : hal-04589272 , version 1

Citer

Sara Faour, Blaz Korecic, Mališa Vučinić, Filip Maksimovic, David C Burnett, et al.. Single-Chip Motes and SRAM PUF: Feasibility Study. IEEE Workshop on Crystal-Free/-Less Radio and System-based Research for IoT (CrystalFreeIoT), Cyber-Physical Systems and Internet-of-Things Week (CPS-IoT Week), May 2024, Hong Kong, Hong Kong SAR China. ⟨hal-04589272⟩

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