Hardening a Neural Network on FPGA through Selective Triplication and Training Optimization
Résumé
The proposed approach identifies SEU sensitive flipflops and optimizes the training phase of a neural network. With this information, selective triplication is applied to improve the reliability with limited resource overhead on an FPGA device.
Domaines
Architectures Matérielles [cs.AR]
Origine : Fichiers produits par l'(les) auteur(s)