Towards ASIP Architecture-Driven Algorithm Development - Inria - Institut national de recherche en sciences et technologies du numérique
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Towards ASIP Architecture-Driven Algorithm Development

Résumé

Application-Specific Instruction-set Processors (ASIP) are ideal for realizing physical layer signal processing algorithms in communication systems as they offer performance similar to hard-wired datapath implementations, while providing sufficient programmability to adapt with the continuously evolving communication standards. Several design choices needs to be made while developing an algorithm for a specific signal processing function, such as the selection of the algorithm itself, choice of the mathematical operations and numerical precision, that affects the throughput, area and power consumption of ASIP implementation. Traditionally, the algorithm development and the ASIP architecture exploration is performed as separate processes resulting in large design time or a sub-optimal solution. This paper presents a simple methodology for the algorithm-ASIP designer(s) to understand the impact of various algorithmic design choices on the ASIP performance and make the right design choices at very early stage, thereby reducing the design time at least by a factor of 2.8x in algorithm research and development.
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Dates et versions

hal-04489006 , version 1 (04-03-2024)

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Manil Dev Gomony, Mihaela Jivanescu, Nikolas Olaziregi. Towards ASIP Architecture-Driven Algorithm Development. 6th International Embedded Systems Symposium (IESS), Sep 2019, Friedrichshafen, Germany. pp.91-100, ⟨10.1007/978-3-031-26500-6_8⟩. ⟨hal-04489006⟩
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