On-board Payload Data Processing Combined with the Roofline Model for Hardware/Software Design - Inria - Institut national de recherche en sciences et technologies du numérique
Conference Papers Year : 2024

On-board Payload Data Processing Combined with the Roofline Model for Hardware/Software Design

Abstract

High-performance on-board payload data processing has become more interesting with the development of radiationhardened multiprocessor System-on-chip (MPSoC). As recent space-qualified MPSoCs include Arm Central Processing Units (CPUs) and Field Programmable Gate Arrays (FPGAs), an efficient design method is required to deal with complex heterogeneous embedded systems. Both data bit-width (data accuracy) and processing performance are important in astronomy, thus the design methodology should concern application-specific Multi-Objective Optimization Problems (MOOPs). This paper proposes to combine the roofline performance model with Design Space Exploration (DSE) of hardware/software designs as a methodology. We use High-Level Synthesis (HLS) for FPGA design to configure different hardware architectures based on C/C++ and pragmas. We develop a benchmark for payload data processing on Arm CPUs and embedded FPGA on a heterogeneous MPSoC by adapting open-source libraries for one of the most commonly used algorithms to provide validated libraries to payload teams. The benchmark takes as constraints the SVOM ECLAIRs payload requirements, and as input data the CCSDS test images, executes applications, and verifies output data. We chose an AMD-Xilinx Zynq UltraScale+ evaluation board and the two-Dimensional Fast Fourier Transform (2-D FFT) as a DSE use case. We designed the benchmark on an Arm Cortex-A53 in bare-metal and an embedded FPGA based on Vitis HLS. The results show a customized roofline model with the hardware/software design. The implemented design has 1.6-55 times faster performance compared to the payload execution time requirement. Based on the proposed roofline model and the DSE results, future payload teams can study the trade-off between execution time and area efficiency to select the most suitable implementation.
Fichier principal
Vignette du fichier
IEEE_Aerospace_2024_v_HAL.pdf (6.25 Mo) Télécharger le fichier
Origin Explicit agreement for this submission
Licence

Dates and versions

hal-04423185 , version 1 (29-01-2024)

Licence

Identifiers

Cite

Seungah LEE, Emmanuel Casseau, Angeliki Kritikakou, Olivier Sentieys, Ruben Salvador, et al.. On-board Payload Data Processing Combined with the Roofline Model for Hardware/Software Design. AeroConf 2024 - IEEE Aerospace Conference, Mar 2024, Big Sky, Montana, United States. pp.1-12, ⟨10.1109/AERO58975.2024.10521057⟩. ⟨hal-04423185⟩
224 View
99 Download

Altmetric

Share

More