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Communication Dans Un Congrès Année : 2022

Residual Runtime Verification via Reachability Analysis

Résumé

We leverage static verification to reduce monitoring overhead when runtime verifying a property. We present a sound and efficient analysis to statically find safe execution paths in the control flow at the intra-procedural level of programs. Such paths are guaranteed to preserve the monitored property and thus can be ignored at runtime. Our analysis guides an instrumentation tool to select program points that should be observed at runtime. The monitor is left to perform residual runtime verification for parts of the program that the analysis could not statically prove safe. Our approach does not depend on dataflow analysis, thus separating the task of residual analysis from static analysis; allowing for seamless integration with many RV frameworks and development pipelines. We implement our approach within BISM, which is a recent tool for bytecode-level instrumentation of Java programs. Our experiments on the DaCapo benchmark show a reduction in instrumentation points by a factor of 2.5 on average (reaching 9), and accordingly, a reduction in the number of runtime events by a factor of 1.8 on average (reaching 6).
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Dates et versions

hal-03911820 , version 1 (23-12-2022)

Identifiants

  • HAL Id : hal-03911820 , version 1

Citer

Yliès Falcone. Residual Runtime Verification via Reachability Analysis. VSTTE 2022 - 14th International Conference on Verified Software: Theories, Tools, and Experiments, Oct 2022, Trento, Italy. pp.1-19. ⟨hal-03911820⟩
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