Analytical Cache Modeling and Tilesize Optimization for Tensor Contractions
Résumé
Data movement between processor and memory hierarchy
is a fundamental bottleneck that limits the performance of
many applications on modern computer architectures. Tiling
and loop permutation are key techniques for improving data
locality. However, selecting effective tile-sizes and loop permutations is particularly challenging for tensor contractions due
to the large number of loops. Even state-of-the-art compilers
usually produce sub-optimal tile-sizes and loop permutations,
as they rely on naive cost models. In this paper we provide an analytical model based approach to multi-level tile
size optimization and permutation selection for tensor contractions. Our experimental results show that this approach
achieves comparable or better performance than state-of-theart frameworks and libraries for tensor contractions.
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