Charge balance law based on conservation of charge is stated and employed to analyze on-chip linear, Fibonacci and exponential charge pumps. For micro-power on-chip implementations, both the positive- and the negative-plate parasitic capacitors have to be considered. Voltage conversion ratios and efficiencies can be obtained in closed form for single- and dual-branch linear charge pumps, but not for Fibonacci and exponential charge pumps. Instead, a first iteration approximation analysis for computing voltage conversion ratio is proposed. For the linear charge pump, efficiency optimization is achieved by first computing the optimal number of stages, and then obtaining from the required output voltage the reduction factor that is a function of load current, flying capacitor and switching frequency. Using a 0.35(m CMOS process, 8X linear, Fibonacci and exponential charge pumps are designed and their performances are compared and confirmed by extensive Cadence Spectre simulations. It is concluded that linear charge pumps attain the best efficiency.