A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4 - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Conference Papers Year : 2012

A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4

Xuan Jie
  • Function : Author
  • PersonId : 1007220
Anh Manh Do
  • Function : Author
  • PersonId : 1007200
Chirn Chye Boon
  • Function : Author
  • PersonId : 1007198
Kiat Seng Yeo
  • Function : Author
  • PersonId : 1007201
Aaron Do
  • Function : Author
  • PersonId : 1007197

Abstract

This paper presents a low power 2.4-GHz fully integrated 1 MHz resolution IEEE 802.15.4 frequency synthesizer designed using 0.18um CMOS technology. An integer-N fully programmable divider employs a novel True-single-phase-clock (TSPC) 47/48 prescaler and a 6 bit P and S counters to provide the 1 MHz output with nearly 45% duty cycle. The PLL uses a series quadrature voltage controlled oscillator (S-QVCO) to generate quadrature signals. The PLL consumes 3.6 mW of power at 1.8 V supply with the fully programmable divider consuming only 600 uW. The S-QVCO consumes 2.8 mW of power with a phase noise of -122dBc/Hz at 1 MHz offset.
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hal-01516000 , version 1 (28-04-2017)

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Manthena Vamshi Krishna, Xuan Jie, Anh Manh Do, Chirn Chye Boon, Kiat Seng Yeo, et al.. A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4. 18th International Conference on Very Large Scale Integration (VLSISOC), Sep 2010, Madrid, Spain. pp.69-99, ⟨10.1007/978-3-642-28566-0_4⟩. ⟨hal-01516000⟩
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