Arrangement to measure and use latency between an input interface and an output interface of a processing device - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Patents Year : 2015
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Dates and versions

hal-01252627 , version 1 (07-01-2016)

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  • HAL Id : hal-01252627 , version 1

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Stéphane Conversy, Géry Casiez, Matthieu Falce, Stéphane Huot, Nicolas Roussel. Arrangement to measure and use latency between an input interface and an output interface of a processing device. France, Patent n° : European application number 15306665.9. 2015. ⟨hal-01252627⟩
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