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Conference Papers Year : 2015

Fast and high quality topology-aware task mapping


Considering the large number of processors and the size of the interconnection networks on exascale-capable supercomputers, mapping concurrently executable and communicating tasks of an application is a complex problem that needs to be dealt with care. For parallel applications, the communication overhead can be a significant bottleneck on scalability. Topology-aware task-mapping methods that map the tasks to the processors (i.e., cores) by exploiting the underlying network information are very effective to avoid, or at worst bend, this limitation. We propose novel, efficient, and effective task mapping algorithms employing a graph model. The experiments show that the methods are faster than the existing approaches proposed for the same task, and on 4096 processors, the algorithms improve the communication hops and link contentions by 16% and 32%, respectively, on the average. In addition, they improve the average execution time of a parallel SpMV kernel and a communication-only application by 9% and 14%, respectively.
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hal-01159677 , version 1 (03-06-2015)


  • HAL Id : hal-01159677 , version 1


Mehmet Deveci, Kamer Kaya, Bora Uçar, Umit V. Catalyurek. Fast and high quality topology-aware task mapping. 29th IEEE International Parallel & Distributed Processing Symposium, May 2015, Hyderabad, India. ⟨hal-01159677⟩
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