The roofline model is a popular approach to ``bounds and bottleneck''performance analysis. It focuses on the limits to performance of processorsbecause of limited bandwidth to off-chip memory. It models upper bounds on performanceas a function of operationalintensity, the ratio of computational operations per byte of data movedfrom/to memory. While operational intensity can be directly measured for aspecific implementation of an algorithm on a particular targetplatform, it is of interest to obtain broader insights on bottlenecks, where various semanticallyequivalent implementations of an algorithm are considered, alongwith analysis for variations inarchitectural parameters. This is currently very cumbersome and requires performance modeling and analysis of many variants.In this paper, we alleviate this problem by using the roofline modelin conjunction with upper bounds onthe operational intensity of computations as a function of cachecapacity, derived using lower bounds on data movement.This enables bottleneck analysis that holds acrossall dependence-preserving semantically equivalent implementations ofan algorithm. We demonstrate the utility of the approach in in assessing fundamental limits to performance and energy efficiencyfor several benchmark algorithms across a design spaceof architectural variations.