Complexity Analysis and Performance Evaluation of Matrix Product on Multicore Architectures
Résumé
The multicore revolution is underway. Classical algorithms must be revisited in order to take the hierarchical memory layout into account. In this paper, we aim at minimizing the number of cache misses paid during the execution of the matrix product kernel on a multicore processor, and we show how to achieve the best possible tradeoff between shared and distributed caches. Comprehensive simulation results confirm the analytical performance predictions and fully establish the practical significance of our new algorithms.
Mots clés
computational complexity
operating system kernels
performance evaluation
shared memory systems
analytical performance prediction
complexity analysis
distributed caches
hierarchical memory
matrix product kernel
multicore architecture
multicore processor
shared caches
Algorithm design and analysis
Analytical models
Bandwidth
Computer architecture
Kernel
Master-slave
Multicore processing
Parallel processing
Performance analysis
Predictive models
cache
matrix product
multi-core