A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC - Inria - Institut national de recherche en sciences et technologies du numérique
Communication Dans Un Congrès Année : 2010

A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC

Résumé

Currently, most of Network on-Chip (NoC) architectures have some limitation in routing decisions. And it makes router nodes overloaded, and sequentially forms deadlock, livelock and congestion. A simple unbuffered router microarchitecture for S-mesh NoC architecture is proposed in this paper. Unbuffered router transforms message without making routing decision. Simulation results showed that S-mesh could get optimal performance in message latency compared with 2D-mesh, Butterfly and Octagon NoC architectures. The Design Compiler synthesis results showed that unbuffered router has obvious advantages on area, and it gets higher operation speed.
Fichier principal
Vignette du fichier
NPC10-IWNoC-105.pdf (247.04 Ko) Télécharger le fichier
Origine Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

hal-01054965 , version 1 (11-08-2014)

Licence

Identifiants

Citer

Hao Liu, Feifei Cao, Dongsheng Liu, Xuecheng Zou, Zhigang Zhang. A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC. IFIP International Conference on Network and Parallel Computing (NPC), Sep 2010, Zhengzhou, China. pp.442-451, ⟨10.1007/978-3-642-15672-4_37⟩. ⟨hal-01054965⟩
114 Consultations
191 Téléchargements

Altmetric

Partager

More