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Conference Papers Year : 1997

Tiling With Limited Resources


In the framework of perfect loop nests with uniform dependences, tiling has been extensively studied as a source-to-source program transformation. Little work has been devoted to the mapping and scheduling of the tiles on to physical processors. We present several new results in the context of limited computational resources, and assuming communication-computation overlap. In particular, under some reasonable assumptions, we derive the optimal mapping and scheduling of tiles to physical processors

Dates and versions

hal-00856895 , version 1 (02-09-2013)



Pierre-Yves Calland, Jack Dongarra, Yves Robert. Tiling With Limited Resources. Application Specific Systems, Architectures and Processors, Jul 1997, Zurich, Switzerland. pp.229-238, ⟨10.1109/ASAP.1997.606829⟩. ⟨hal-00856895⟩
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