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Master Thesis Year : 2009

Génération automatique de circuits pour le calcul de couplages cryptographiques en matériel

Abstract

This document report the work that I realize during my Master 2 internship in the project-team CACAO at LORIA under the supervision of Jérémie Detrey and the co-supervision of Jean-Luc Beuchat (LCIS, Japan). In order to compute cryptographic pairings efficiently on some dedicated circuits, we design a family of specific coprocessors and an automatic tools for programming them. Then we have explored a large range of trade-off in the choice of algorithms and the architecture of the coprocessor. Thanks to a finely tuned co-design we present good performances in pairing computation.
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Dates and versions

hal-00772483 , version 1 (10-01-2013)

Identifiers

  • HAL Id : hal-00772483 , version 1

Cite

Nicolas Estibals. Génération automatique de circuits pour le calcul de couplages cryptographiques en matériel. Automatique. 2009. ⟨hal-00772483⟩
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