Efficient custom instruction enumeration for extensible processors - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Conference Papers Year : 2011
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hal-00746745 , version 1 (29-10-2012)

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  • HAL Id : hal-00746745 , version 1

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Emmanuel Casseau, Chenglong Xiao. Efficient custom instruction enumeration for extensible processors. IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), Sep 2011, Santa Monica, United States. pp.211-214. ⟨hal-00746745⟩
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