A design methodology for specification and performances evaluation of Network On Chip - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Conference Papers Year : 2011
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hal-00650595 , version 1 (11-12-2011)

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  • HAL Id : hal-00650595 , version 1

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Djamel Adrouche, Rabah Sadoun, Sébastien Pillement. A design methodology for specification and performances evaluation of Network On Chip. IEEE International Workshop on Reliability Aware System Design and Test, 2011, Chennai, India. ⟨hal-00650595⟩
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