A Phase Change Memory as a Secure Main Memory - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Journal Articles IEEE Computer Architecture Letters Year : 2010

A Phase Change Memory as a Secure Main Memory

André Seznec

Abstract

Phase change memory (PCM) technology appears as more scalable than DRAM technology. As PCM exhibits access time slightly longer but in the same range as DRAMs, several recent studies have proposed to use PCMs for designing main memory systems. Unfortunately PCM technology suffers from a limited write endurance; typically each memory cell can be only be written a large but still limited number of times (107 to 109 writes are reported for current technology). Till now, research proposals have essentially focused their attention on designing memory systems that will survive to the average behavior of conventional applications. However PCM memory systems should be designed to survive worst-case applications, i.e., malicious attacks targeting the physical destruction of the memory through overwriting a limited number of memory cells. In this paper, we propose the design of a secure PCM-based main memory that would by construction survive to overwrite attacks.
Fichier principal
Vignette du fichier
lca2010990002.pdf (89.22 Ko) Télécharger le fichier
Origin : Publisher files allowed on an open archive
Loading...

Dates and versions

inria-00468866 , version 1 (31-03-2010)

Identifiers

  • HAL Id : inria-00468866 , version 1

Cite

André Seznec. A Phase Change Memory as a Secure Main Memory. IEEE Computer Architecture Letters, 2010. ⟨inria-00468866⟩
346 View
487 Download

Share

Gmail Facebook X LinkedIn More