A NUMA Aware Scheduler for a Parallel Sparse Direct Solver - Inria - Institut national de recherche en sciences et technologies du numérique Accéder directement au contenu
Communication Dans Un Congrès Année : 2008

A NUMA Aware Scheduler for a Parallel Sparse Direct Solver

Résumé

Over the past few years, parallel sparse direct solvers made significant progress and are now able to solve efficiently industrial three-dimensional problems with several millions of unknowns. An hybrid MPI-thread implementation of our direct solver PaStiX is already well suited for SMP nodes or new multi-core architectures and drastically reduced the memory overhead and improved scalability. In the context of distributed NUMA architectures, a dynamic scheduler based on a work-stealing algorithm has been developed to fill in communication idle times. On these architectures, it is important to take care of NUMA effects and to preserve memory affinity during the work-stealing. The scheduling of communications also needs to be adapted, especially to ensure the overlap by computations. Experiments on numerical test cases will be presented to prove the efficiency of the approach on NUMA architectures. If memory is not large enough to treat a given problem, disks must be used to store data that cannot fit in memory (out-of-core storage). The idle-times due to disk access have to be managed by our dynamic scheduler to prefetch and save datasets. Thus, we design and study specific scheduling algorithms in this particular context.
Fichier non déposé

Dates et versions

inria-00344709 , version 1 (05-12-2008)

Identifiants

  • HAL Id : inria-00344709 , version 1

Citer

Mathieu Faverge, Xavier Lacoste, Pierre Ramet. A NUMA Aware Scheduler for a Parallel Sparse Direct Solver. PMAA'08, 2008, Neuchâtel, Switzerland. ⟨inria-00344709⟩
98 Consultations
0 Téléchargements

Partager

Gmail Facebook X LinkedIn More