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Communication Dans Un Congrès Année : 2023

Deployment Performance In Post-Moore-Based HPC Sustainable Platforms

Résumé

HPC platforms based in post-Moore architectures integrate multiple specific-purpose chips in heterogenous architectures, focusing on embedded and low-power computational infrastructures (i.e., RISC architecture processors) to improve energy efficiency and low cost. Currently, these platforms are very useful to implement from miliclusters to edge/cloud exchange nodes because in addition to their low cost, they present an adequate relationship in terms of performance, scalability, and sustainability. This work discusses the performance and sustainability of deploying S.O. images and applications in embedded post-Moore architectures addressed to HPC sustainable platforms.
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Dates et versions

hal-04481607 , version 1 (28-02-2024)

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  • HAL Id : hal-04481607 , version 1

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Pablo Josue Rojas Yepes, Carlos Jaime Barrios-Hernandez, Oscar Carrillo, Frédéric Le Mouël. Deployment Performance In Post-Moore-Based HPC Sustainable Platforms. 4th CATAÏ Workshop - Circular Architectures for Advanced Computing @CARLA, Sep 2023, Cartagena De Indias, Colombia. ⟨hal-04481607⟩
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