Impact of High-Level-Synthesis on Reliability of Neural Network Hardware Accelerators

We characterize the impact of High-Level Synthesis (HLS) on the reliability of Neural Networks on FPGAs exposed to neutron. Our results show that the larger the circuit generated by HLS, the larger the error rate.

Mots clés

FPGA - field-Programmable gate array Neural networks Reliability Radiations High-Level Synthesis Hardware Accelerators

Domaines

Systèmes embarqués Informatique [cs]

Fichier principal

G_115_Traiola_2023-02-04_01_32_37 (1).pdf (923.36 Ko)

Origine	Fichiers produits par l'(les) auteur(s)

Marcello TRAIOLA : Connectez-vous pour contacter le contributeur

https://inria.hal.science/hal-04113282

Soumis le : jeudi 1 juin 2023-18:04:12

Dernière modification le : mardi 5 novembre 2024-09:48:07

Dates et versions

hal-04113282 , version 1 (01-06-2023)

hal-04113282 , version 2 (01-06-2023)

Licence

Paternité

Identifiants

HAL Id : hal-04113282 , version 2

Citer

Marcello Traiola, Fernando Fernandes Dos Santos, Olivier Sentieys, Angeliki Kritikakou. Impact of High-Level-Synthesis on Reliability of Neural Network Hardware Accelerators. NSREC 2023 - IEEE Nuclear & Space Radiation Effects Conference, Jul 2023, Kansas City (US), United States. pp.1-5. ⟨hal-04113282v2⟩

Exporter

BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite

Collections

UNIV-RENNES1 CNRS INRIA INSA-RENNES IRISA CENTRALESUPELEC INRIA2 UR1-MATH-STIC UR1-UFR-ISTIC UNIV-RENNES UR1-MATH-NUM

135 Consultations

197 Téléchargements