Impact of High-Level-Synthesis on Reliability of Neural Network Hardware Accelerators

We characterize the impact of High-Level Synthesis (HLS) on the reliability of Neural Networks on FPGAs exposed to neutron. Our results show that the larger the circuit generated by HLS, the larger the error rate.

Keywords

FPGA - field-Programmable gate array Neural networks Reliability Radiations High-Level Synthesis Hardware Accelerators

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Embedded Systems Computer Science [cs]

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G_115_Traiola_2023-02-04_01_32_37 (1).pdf (923.36 Ko)

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Marcello TRAIOLA : Connect in order to contact the contributor

https://inria.hal.science/hal-04113282

Submitted on : Thursday, June 1, 2023-6:04:12 PM

Last modification on : Tuesday, November 5, 2024-9:48:07 AM

Dates and versions

hal-04113282 , version 1 (01-06-2023)

hal-04113282 , version 2 (01-06-2023)

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HAL Id : hal-04113282 , version 2

Cite

Marcello Traiola, Fernando Fernandes Dos Santos, Olivier Sentieys, Angeliki Kritikakou. Impact of High-Level-Synthesis on Reliability of Neural Network Hardware Accelerators. NSREC 2023 - IEEE Nuclear & Space Radiation Effects Conference, Jul 2023, Kansas City (US), United States. pp.1-5. ⟨hal-04113282v2⟩

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