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Journal Articles IEEE Micro Year : 2022

SpecHLS: Speculative Accelerator Design using High-Level Synthesis


Custom hardware accelerators usage is shifting towards new application domains such as graph analytics and unstructured text analysis. These applications expose complex control-flow which is challenging to map to hardware, especially when operating from a C/C++ description using High-Level Synthesis toolchains. Several approaches relying on speculative execution have been proposed to overcome those limitations, but they often fail to handle the multiple interacting speculations required for realistic use-cases. This paper proposes a fully automated hardware synthesis flow based on a source-to-source compiler that identifies and explores intricate speculation configurations to generate speculative hardware accelerators.
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Dates and versions

hal-03714101 , version 1 (05-07-2022)





Jean-Michel Gorius, Simon Rokicki, Steven Derrien. SpecHLS: Speculative Accelerator Design using High-Level Synthesis. IEEE Micro, In press, pp.1-10. ⟨10.1109/mm.2022.3188136⟩. ⟨hal-03714101⟩
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