Experimental Demonstration of Real Time Receiver for FDMA PON

FDMA PON provides high aggregate capacity (20-40Gbps) without requiring the user modules to operate at such high data rate. In this paper, we present for the first time a real time implementation of a FDM receiver in FPGA 1Gbitps in transceiver modules for an ONU and OLT.

Keywords

PON FPGA ONU FDMA Real Time

Domains

Networking and Internet Architecture [cs.NI] Optics [physics.optics]

Fichier principal

FAON_ecoc2015_v06-1.pdf (418.8 Ko)

Origin	Files produced by the author(s)

Arnaud Carer : Connect in order to contact the contributor

https://inria.hal.science/hal-01166164

Submitted on : Monday, June 22, 2015-11:46:16 AM

Last modification on : Wednesday, November 6, 2024-11:08:03 AM

Long-term archiving on : Tuesday, April 25, 2017-5:55:56 PM

Dates and versions

hal-01166164 , version 1 (22-06-2015)

Identifiers

HAL Id : hal-01166164 , version 1
DOI : 10.1109/ECOC.2015.7341628

Cite

R. Bardoux, Arnaud Carer, Aurélien Lebreton, Laurent Bramerie, Pascal Scalart, et al.. Experimental Demonstration of Real Time Receiver for FDMA PON. 41st European Conference on Optical Communication (ECOC 2015), Sep 2015, Valencia, Spain. ⟨10.1109/ECOC.2015.7341628⟩. ⟨hal-01166164⟩

Export

BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite

Collections

CEA UNIV-RENNES1 CNRS INRIA INSA-RENNES ENSSAT IRISA FOTON FOTON_SYSPHOT CENTRALESUPELEC IRISA-D3 DRT INRIA2 UR1-MATH-STIC UR1-UFR-ISTIC LETI UNIV-RENNES INSA-GROUPE CEA-GRE ANR UR1-MATH-NUM

427 View

300 Download