Architecture Analysis and Design Language (AADL) is an architecture description language standard forembedded realtimesystems widely used in the avionics and aerospace industry to model safetycriticalapplications. To verify and analyze the AADL models, model transformation technologies are often usedto automatically extract a formal specification suitable for analysis and verification. In this process, itremains a challenge to prove that the model transformation preserves the semantics of the initial AADLmodel or, at least, some of the specific properties or requirements it needs to satisfy. This paper presents amachine checked semanticspreservingtransformation of a subset of AADL (including periodic threads,data port communications, mode changes, and the AADL behavior annex) into Timed Abstract StateMachines (TASM). The AADL standard itself lacks at present a formal semantics to make this translationvalidation possible. Our contribution is to bridge this gap by providing two formal semantics for the subsetof AADL. The execution semantics provided by the AADL standard is formalized as Timed TransitionSystems (TTS). This formalization gives a reference expression of AADL semantics which can be comparedwith the TASMbasedtranslation (for verification purpose). Finally, the verified transformation ismechanized in the theorem prover Coq.