Scheduling Instructions on Hierarchical Machines - Inria - Institut national de recherche en sciences et technologies du numérique Access content directly
Conference Papers Year : 2010

Scheduling Instructions on Hierarchical Machines


The aim of this work is to study the problem of scheduling fine grain task graphs on hierarchical distributed systems with communication delay. We consider as a case study how to schedule the instructions on a processor that implements incomplete bypass ( ST200). We show first how this problem can be expressed as scheduling unitary tasks on a hierarchical architecture with heavy communications between clustered units. The proposed analysis is generic and can be extended to other challenging problems like scheduling in clusters of multi-cores. Our main result is an approximation algorithm based on list scheduling whose approximation ratio is the minimum of two expressions, the first one depends on the number of clusters while the second one depends on the communication delay. Experiments run on random graphs and on structured graphs demonstrate the effectiveness of the proposed approach.
No file

Dates and versions

hal-00798448 , version 1 (08-03-2013)



Florent Blachot, Guillaume Huard, Johnatan Pecero Sanchez, Érik Saule, Denis Trystram. Scheduling Instructions on Hierarchical Machines. 11th International Workshop on Parallel and Distributed Scientific and Engineering Computing (PDSEC 2010), 2010, Atlanta, United States. ⟨10.1109/IPDPSW.2010.5470711⟩. ⟨hal-00798448⟩
144 View
0 Download



Gmail Facebook X LinkedIn More