Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network - Inria - Institut national de recherche en sciences et technologies du numérique
Article Dans Une Revue Journal of Systems Architecture Année : 2011

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hal-00650650 , version 1 (11-12-2011)

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Daniel Chillet, Antoine Eiche, Sébastien Pillement, Olivier Sentieys. Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network. Journal of Systems Architecture, 2011, 57, pp.340-353. ⟨10.1016/j.sysarc.2011.01.004⟩. ⟨hal-00650650⟩
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