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Conference Papers Year : 2007

A Novel Asynchronous e-FPGA Architecture for Security Applications

Abstract

With the growing security needs of applications such as homeland security or banking, the frequent updates in cryptographic standards and the high ASIC costs, the ciphering algorithms on an asynchronous embedded FPGA co-processor are becoming a viable alternative. Within the SAFE project, a novel architecture of asynchronous e FPGA has been proposed. This architecture is natively robust against side channel attacks such as simple and differential power analysis or clock based fault attacks.
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Dates and versions

hal-04510604 , version 1 (12-04-2024)

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Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin, Sumanta Chaudhuri, et al.. A Novel Asynchronous e-FPGA Architecture for Security Applications. ICFPT 2007 - IEEE International Conference on Field-Programmable Technology, Dec 2007, Kitakyusyu, Japan. pp.369-372, ⟨10.1109/FPT.2007.4439288⟩. ⟨hal-04510604⟩
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