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Advanced speculation to increase the performance of superscalar processorsPerformance [cs.PF]. Université Rennes 1, 2020. English. ⟨NNT : 2020REN1S007⟩
Theses
tel-03033709v1
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Tightening contention delays while scheduling parallel applications on multi-core architecturesInternational Conference on Embedded Software (EMSOFT), 2017, Oct 2017, Seoul, South Korea. pp.20, ⟨10.1145/3126496⟩
Conference papers
hal-01590508v1
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MLExplainOCaml 2018, Sep 2018, Saint Louis, United States. pp.1-4
Conference papers
hal-02056392v1
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Guided just-in-time specializationScience of Computer Programming, 2019, 185, pp.41. ⟨10.1016/j.scico.2019.102318⟩
Journal articles
hal-02314442v1
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Ordinateurs quantiques : ouvrons la boîteCOMPAS 2019 - Conférence d'informatique en Parallélisme, Architecture et Système, Jun 2019, Anglet, France. pp.1-9
Conference papers
hal-02318324v1
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CATREEN : Context-Aware Code Timing Estimation with Stacked Recurrent NetworksICTAI 2022 - 34th IEEE International Conference on Tools with Artificial Intelligence, Oct 2022, Virtually, China. pp.1-6, ⟨10.1109/ICTAI56018.2022.00090⟩
Conference papers
hal-03890057v2
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Compile-Time Function Memoization26th International Conference on Compiler Construction, Feb 2017, Austin, United States
Conference papers
hal-01423811v1
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CATREEN: Context-Aware Code Timing Estimation with Stacked Recurrent Networks2022
Preprints, Working Papers, ...
hal-03776508v1
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Transforming TLP into DLP with the Dynamic Inter-Thread Vectorization Architecture[Research Report] RR-8830, Inria Rennes Bretagne Atlantique. 2015
Reports
hal-01244938v1
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Supporting Runtime Reconfigurable VLIWs Cores Through Dynamic Binary TranslationDATE 2018 - IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition, Mar 2018, Dresden, Germany. pp.1009-1014, ⟨10.23919/DATE.2018.8342160⟩
Conference papers
hal-01653110v2
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StAMP: Static Analysis of Memory access Profiles for real-time tasksWCET 2022 - 20th International Workshop on Worst-Case Execution Time Analysis, Jul 2022, Modena, Italy. ⟨10.4230/OASIcs.WCET.2022.1⟩
Conference papers
hal-03723457v1
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Value Speculation through Equality PredictionICCD 2019 - 37th IEEE International Conference on Computer Design, Nov 2019, Abu Dhabi, United Arab Emirates. pp.1-4
Conference papers
hal-02383480v1
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Divergence AnalysisACM Transactions on Programming Languages and Systems (TOPLAS), 2013, 35 (4), pp.13:1-13:36. ⟨10.1145/2523815⟩
Journal articles
hal-00909072v3
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Vers la reconfiguration adaptative de GPU pour chaque applicationCOMPAS 2019 - Conférence d'informatique en Parallélisme, Architecture et Système, Jun 2019, Anglet, France. pp.1-6
Conference papers
hal-02390821v1
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Deliverable D2.2 – Description of a specific optimization for low power[Research Report] Inria Rennes - Bretagne Atlantique; LIRMM (UM, CNRS). 2017
Reports
lirmm-03168308v1
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Deliverable D3.2 - Evaluation of selected memory and communication technologies and exploitation opportunities in compilation and runtime management[Research Report] LIRMM (UM, CNRS); Inria Rennes – Bretagne Atlantique. 2017
Reports
lirmm-03168318v1
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The W-SEPT Project: Towards Semantic-Aware WCET Estimation17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), Jun 2017, Dubrovnik, Croatia. pp.13, ⟨10.4230/OASIcs.WCET.2017.9⟩
Conference papers
hal-01590442v1
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Understanding Cache CompressionACM Transactions on Architecture and Code Optimization, 2021, 18 (3), pp.1-27. ⟨10.1145/3457207⟩
Journal articles
hal-03285041v1
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A Simple Model of Processor Temperature for Deterministic Turbo Clock Frequency[Research Report] RR-9308, Inria. 2019
Reports
hal-02391970v2
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Toward compression-aware prefetchingCOMPAS 2019 - Conférence d'informatique en Parallélisme, Architecture et Système, Jun 2019, Anglet, France. pp.1-9
Conference papers
hal-02351461v1
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A framework for automatic and parameterizable memoizationSoftwareX, 2019, 10, pp.100322. ⟨10.1016/j.softx.2019.100322⟩
Journal articles
hal-02305415v1
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Compressed cache layout aware prefetchingSBAC-PAD 2019 - International Symposium on Computer Architecture and High Performance Computing, Oct 2019, Campo Grande, MS, Brazil. pp.1-4
Conference papers
hal-02316773v1
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FITTCHOOSER: A Dynamic Feedback-Based Fittest Optimization ChooserHPCS 2018 - 16th International Conference on High Performance Computing & Simulation - Special Session on Compiler Architecture, Design and Optimization, Jul 2018, Orléans, France. pp.1-8
Conference papers
hal-01808658v1
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Compile-Time Silent-Store Elimination for Energy Efficiency: an Analytic Evaluation for Non-Volatile Cache MemoryRAPIDO: Rapid Simulation and Performance Evaluation, HiPEAC, Jan 2018, Manchester, United Kingdom. pp.1-8, ⟨10.1145/3180665.3180666⟩
Conference papers
hal-01660686v1
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Fine-Grain Iterative Compilation for WCET EstimationWCET 2018 - 18th International Workshop on Worst-Case Execution Time Analysis, Jul 2018, Barcelona, Spain. pp.1-12, ⟨10.4230/OASIcs.WCET.2018.9⟩
Conference papers
hal-01889944v1
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Software-level analysis and optimization to mitigate the cost of write operations on non-volatile memoriesPerformance [cs.PF]. Université de Rennes, 2018. English. ⟨NNT : 2018REN1S073⟩
Theses
tel-02089718v1
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The ANTAREX domain specific language for high performance computingMicroprocessors and Microsystems: Embedded Hardware Design , 2019, 68, pp.58-73. ⟨10.1016/j.micpro.2019.05.005⟩
Journal articles
hal-02189586v1
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Attack detection through monitoring of timing deviations in embedded real-time systemsECRTS 2020 - 32nd Euromicro Conference on Real-Time Systems, Jul 2020, Modena, Italy. pp.1-22, ⟨10.4230/LIPIcs.ECRTS.2020.8⟩
Conference papers
hal-02559549v1
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Simty: a Synthesizable General-Purpose SIMT Processor[Research Report] RR-8944, Inria Rennes Bretagne Atlantique. 2016
Reports
hal-01351689v2
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Performance Centric Dynamic Function Level Binary TransformationOther [cs.OH]. Université de Rennes 1 [UR1], 2019. English. ⟨NNT : ⟩
Theses
tel-02394383v1
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