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authIdHal_s : florent-de-dinechin
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Table-Based versus Shift-And-Add constant multipliers for FPGAs

Florent de Dinechin , Silviu-Ioan Filip , Luc Forget , Martin Kumm
ARITH 2019 - 26th IEEE Symposium on Computer Arithmetic, Jun 2019, Kyoto, Japan. pp.1-8
Conference papers hal-02147078v1
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Multiplication by rational constants

Florent de Dinechin
IEEE Transactions on Circuits and Systems Part 2 Analog and Digital Signal Processing, 2012, pp.00. ⟨10.1109/TCSII.2011.2177706⟩
Journal articles ensl-00610328v3

Mixed-Precision Merged Multiplication and Addition Operator

Nicolas Brunie , Florent de Dinechin , Benoît de Dinechin
France, Patent n° : WO/2012/175828. 2012
Patents hal-01021919v1
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Fast and correctly rounded logarithms in double-precision

Florent de Dinechin , Christoph Lauter , Jean-Michel Muller
[Research Report] RR-5682, LIP RR-2005-37, INRIA, LIP. 2005, pp.15
Reports inria-00070331v1

Digital Arithmetic

Florent de Dinechin , Milos Ercegovac , Jean-Michel Muller , Nathalie Revol
Benjamin Wah. Wiley Encyclopedia of Computer Science and Engineering, Wiley, pp.935-948, 2009
Book sections ensl-00542215v1
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On Ziv's rounding test

Florent de Dinechin , Christoph Lauter , Jean-Michel Muller , Serge Torres
ACM Transactions on Mathematical Software, 2013, 39 (4), pp.26
Journal articles ensl-00693317v2

Evaluating Elementary Functions

Florent de Dinechin , Jean-Michel Muller
Nicholas Higham. Princeton Companion to Applied Mathematics, Princeton University Press, pp.2, 2014
Book sections ensl-00989001v1

Handbook of Floating-Point Arithmetic

Jean-Michel Muller , Nicolas Brisebarre , Florent de Dinechin , Claude-Pierre Jeannerod , Vincent Lefèvre et al.
Birkhauser Boston, pp.572, 2010
Books ensl-00379167v1
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Code generators for mathematical functions

Nicolas Brunie , Florent de Dinechin , Olga Kupriianova , Christoph Lauter
22d IEEE Symposium on Computer Arithmetic, Jun 2015, Lyon, France
Conference papers hal-01084726v2
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Hardware division by small integer constants

Fatih Ugurdag , Florent de Dinechin , Yilmaz Serhan Gener , Sezer Gören , Laurent-Stéphane Didier et al.
IEEE Transactions on Computers, 2017, ⟨10.1109/TC.2017.2707488⟩
Journal articles hal-01402252v2
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Resource Optimal Truncated Multipliers for FPGAs

Andreas Böttcher , Martin Kumm , Florent de Dinechin
ARITH 2021 - 28th IEEE International Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-8, ⟨10.1109/ARITH51176.2021.00029⟩
Conference papers hal-03220290v1
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Design-space exploration for the Kulisch accumulator

Yohann Uguen , Florent de Dinechin
2017
Preprints, Working Papers, ... hal-01488916v2
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Karatsuba with Rectangular Multipliers for FPGAs

Martin Kumm , Oscar Gustafsson , Florent de Dinechin , Johannes Kappauf , Peter Zipf et al.
ARITH 2018 - 25th IEEE International Symposium on Computer Arithmetic, Jun 2018, Amherst, United States. pp.13-20, ⟨10.1109/ARITH.2018.8464809⟩
Conference papers hal-01773447v1
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High-level synthesis and arithmetic optimizations

Yohann Uguen , Florent de Dinechin , Steven Derrien
Compas'2016, Jul 2016, Lorient, France
Poster communications hal-02131970v1
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Racines carrées multiplicatives sur FPGA

Florent de Dinechin , Mioara Maria Joldes , Bogdan Pasca , Guillaume Revy
2009
Preprints, Working Papers, ... ensl-00388064v1

Code generation for argument filtering and argument reduction in elementary functions

Florent de Dinechin , Claude-Pierre Jeannerod , David Pfannholzer , Nathalie Revol
SCAN 2010: 14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics, Revol, Nathalie and de Dinechin, Florent and Jeannerod, Claude-Pierre and Lefèvre, Vincent and Louvet, Nicolas and Morin, Sèverine and Nguyen, Hong Diep, Sep 2010, Lyon, France
Conference papers inria-00544808v1
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Table-based division by small integer constants

Florent de Dinechin , Laurent-Stéphane Didier
8th International Symposium on Applied Reconfigurable Computing (ARC), Mar 2012, Hong Kong, Hong Kong SAR China. pp.53-63, ⟨10.1007/978-3-642-28365-9_5⟩
Conference papers ensl-00642145v1
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Matériel et logiciel pour l'évaluation de fonctions numériques : précision, performance et validation

Florent de Dinechin
Informatique [cs]. Université Claude Bernard - Lyon I, 2007
Habilitation à diriger des recherches tel-00270151v1
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Computing floating-point logarithms with fixed-point operations

Julien Le Maire , Nicolas Brunie , Florent de Dinechin , Jean-Michel Muller
23rd IEEE Symposium on Computer Arithmetic, IEEE, Jul 2016, Santa Clara, United States
Conference papers hal-01227877v1
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Towards Hardware IIR Filters Computing Just Right: Direct Form I Case Study

Anastasia Volkova , Matei Istoan , Florent de Dinechin , Thibault Hilaire
IEEE Transactions on Computers, 2019, 68 (4), pp.597 - 608. ⟨10.1109/TC.2018.2879432⟩
Journal articles hal-01561052v3
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Some Improvements on Multipartite Table Methods

Florent de Dinechin , Arnaud Tisserand
[Research Report] RR-4059, INRIA. 2000
Reports inria-00072577v1
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Second Order Function Approximation with a Single Small Multiplication

Jérémie Detrey , Florent de Dinechin
[Research Report] RR-5140, LIP RR-2004-13, INRIA, LIP. 2004
Reports inria-00071443v1
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Fast correct rounding of elementary functions in double precision using double-extended arithmetic

Florent de Dinechin , David Defour , Christoph Lauter
[Research Report] RR-5137, LIP RR-2004-10, INRIA, LIP. 2004
Reports inria-00071446v1
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Multiplicative square root algorithms for FPGAs

Florent de Dinechin , Mioara Maria Joldes , Bogdan Pasca , Guillaume Revy
International Conference on Field Programmable Logic and Applications, Aug 2010, Milano, Italy. pp.14, ⟨10.1109/FPL.2010.112⟩
Conference papers ensl-00475779v2
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Certifying the floating-point implementation of an elementary function using Gappa

Florent de Dinechin , Christoph Lauter , Guillaume Melquiond
IEEE Transactions on Computers, 2011, 60 (2), pp.242-253. ⟨10.1109/TC.2010.128⟩
Journal articles ensl-00200830v2
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Generating high-performance arithmetic operators for FPGAs

Florent de Dinechin , Cristian Klein , Bogdan Pasca
2008
Preprints, Working Papers, ... ensl-00321209v1
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Return of the hardware floating-point elementary function

Jérémie Detrey , Florent de Dinechin , Xavier Pujol
18th Symposium on Computer Arithmetic, Jun 2007, Montpellier, France. pp.161-168
Conference papers ensl-00117386v1
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A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic

Florent de Dinechin , Jérémie Detrey
Journal of Signal Processing Systems, 2007, 49 (1), pp.161-175. ⟨10.1007/s11265-007-0048-7⟩
Journal articles istex ensl-00542212v1
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Integer and Floating-Point Constant Multipliers for FPGAs

Nicolas Brisebarre , Florent de Dinechin , Jean-Michel Muller
International Conference on Application-Specific Systems, Architectures and Processors, 2008, IMEC, Jul 2008, Leuven, Belgium. pp.239-244, ⟨10.1109/ASAP.2008.4580184⟩
Conference papers ensl-00269219v1
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Automatic generation of polynomial-based hardware architectures for function evaluation

Florent de Dinechin , Mioara Joldes , Bogdan Pasca
Application-specific Systems, Architectures and Processors, Jul 2010, Rennes, France
Conference papers ensl-00470506v1