Audio DSP to FPGA Compilation - Inria - Institut national de recherche en sciences et technologies du numérique
Communication Dans Un Congrès Année : 2023

Audio DSP to FPGA Compilation

Compilation Audio DSP vers FPGA

Résumé

The implementation of real-time audio Digital Signal Processing (DSP) applications on FPGA has been extensively studied in the past. Up to now, Audio IPs 1 were designed either "by hand" in VHDL or using predefined IPs in block synthesis environments. The advent of High Level Synthesis (HLS) allows for a real compilation flow from high-level audio DSP specifications down to FPGA bit-streams. This paper presents the principles and the implementation of the first "audio DSP compiler" targeting FPGAs. Our fully open-source system compiles audio DSP programs down to FPGA hardware and up to actual sound production. This compilation flow presents two important technological breakthroughs for audio programmers: achieving ultra-low latency real-time audio DSP (few micro-seconds) and the possibility of easily deploying systems with a large number of audio channels.
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Dates et versions

hal-04414324 , version 1 (24-01-2024)

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Maxime Popoff, Romain Michon, Tanguy Risset, Pierre Cochard, Stephane Letz, et al.. Audio DSP to FPGA Compilation. International Conference on Application-specific Systems, Architectures and Processors (ASAP 2023), Jul 2023, Porto, Portugal. pp.31-33, ⟨10.1109/ASAP57973.2023.00018⟩. ⟨hal-04414324⟩
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