Indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) are simulated using TCAD software. Nonlinearities observed in fabricated devices are obtained through simulation and corresponding physical characteristics are further investigated. For small channel length (below 1 µm) TFTs’ simulations show short channel effects, namely drain-induced barrier lowering (DIBL), and effectively source-channel barrier is shown to decrease with drain bias. Simulations with increasing shallow donor-like states result in transfer characteristics presenting hump-like behavior as typically observed after gate bias stress. Additionally, dual-gate architecture is simulated, exhibiting threshold voltage modulation by the second gate biasing.