To deal with Wireless Sensor Node's energy constraints , new architectural solutions have to be found. This paper proposes to analyze a WSN microcontroller subsystem power consumption to extract the main power contributors according to different applicative execution phases. The objective is to come out with the energy reduction potentiality offered by an additional module called Wake-Up Controller. This block is able to substitute to the main CPU for current tasks like data transfers between sensors, memories or radio and fine grain power/frequency management of the entire node's sub-modules. Power simulations of a microcontroller subsystem based on FDSOI28 technology, with and without the Wake-Up Controller use, are proposed. Results are presented for applicative scenarios ranging from very low to high activity rates. This study exhibits power gains from 14.5% to 76% in the full range attesting the future design of this new module.