Parallel light speed labeling: An efficient connected component labeling algorithm for multi-core processors - Inria - Institut national de recherche en sciences et technologies du numérique
Conference Papers Year : 2015

Parallel light speed labeling: An efficient connected component labeling algorithm for multi-core processors

Abstract

The paper introduces the parallel version of the Light Speed Labeling (LSL) and compares it with the parallel versions of the competitors. A benchmark shows that the parallel Light Speed Labeling is at least ×1.9 faster than all the other algo- rithms for random images. This factor reach ×3.6 for structured random images. More important, we show that thanks to its run-based processing (segments), LSL is intrinsically more efficient than all pixel-based algorithms.
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hal-01243310 , version 1 (06-03-2024)

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Lionel Lacassagne, Laurent Cabaret, Daniel Etiemble. Parallel light speed labeling: An efficient connected component labeling algorithm for multi-core processors. IEEE International Conference on Image Processing (ICIP 2015), Sep 2015, Quebec, Canada. pp.3486-3489, ⟨10.1109/ICIP.2015.7351452⟩. ⟨hal-01243310⟩
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