TERAFLUX: Harnessing dataflow in next generation teradevices
Roberto Giorgi
(1)
,
Rosa M. Badia
(2)
,
François Bodin
(3)
,
Albert Cohen
(4)
,
Paraskevas Evripidou
(5)
,
Paolo Faraboschi
(6)
,
Bernhard Fechner
(7)
,
Guang R. Gao
(8)
,
Arne Garbade
(2, 7)
,
Rahul Gayatri
(2)
,
Sylvain Girbal
(9)
,
Daniel Goodman
(10)
,
Behran Khan
(10)
,
Souad Koliaï
(8)
,
Joshua Landwehr
(8)
,
Nhat Minh
(4)
,
Feng Li
(4)
,
Mikel Lujàn
(10)
,
Avi Mendelson
(11)
,
Laurent Morin
(3)
,
Nacho Navarro
(2)
,
Tomasz Patejko
(2)
,
Antoniu Pop
(4)
,
Pedro Trancoso
(5)
,
Theo Ungerer
(7)
,
Ian Watson
(10)
,
Sebastian Weis
(7)
,
Stéphane Zuckerman
(8)
,
Mateo Valero
(2)
1
DIISM -
Dipartimento di Ingegneria dell'informazione e scienze matematiche [Siena]
2 BSC-CNS - Barcelona Supercomputing Center - Centro Nacional de Supercomputacion
3 CAPS entreprise [Rennes]
4 Parkas - Parallélisme de Kahn Synchrone
5 Computer Science Department [Cyprus]
6 Intelligent Infrastructure Lab. [Barcelona]
7 UNIA - Universität Augsburg [Deutschland] = University of Augsburg [Germany] = Université d'Augsburg [Allemagne]
8 University of Delaware [Newark]
9 THALES [France]
10 University of Manchester [Manchester]
11 Technion - Israel Institute of Technology [Haifa]
2 BSC-CNS - Barcelona Supercomputing Center - Centro Nacional de Supercomputacion
3 CAPS entreprise [Rennes]
4 Parkas - Parallélisme de Kahn Synchrone
5 Computer Science Department [Cyprus]
6 Intelligent Infrastructure Lab. [Barcelona]
7 UNIA - Universität Augsburg [Deutschland] = University of Augsburg [Germany] = Université d'Augsburg [Allemagne]
8 University of Delaware [Newark]
9 THALES [France]
10 University of Manchester [Manchester]
11 Technion - Israel Institute of Technology [Haifa]
Albert Cohen
- Fonction : Auteur
- PersonId : 12723
- IdHAL : albert-cohen
- ORCID : 0000-0003-1337-4012
- IdRef : 032462131
Feng Li
- Fonction : Auteur
- PersonId : 760669
- ORCID : 0000-0003-3533-0184
Sebastian Weis
- Fonction : Auteur
- PersonId : 770344
- ORCID : 0000-0003-3201-2375
Résumé
The improvements in semiconductor technologies are gradually enabling extreme-scale systems such as teradevices (i.e., chips composed by 1000 billion of transistors), most likely by 2020. Three major challenges have been identified: programmability, manageable architecture design, and reliability. TERAFLUX is a Future and Emerging Technology (FET) large-scale project funded by the European Union, which addresses such challenges at once by leveraging the dataflow principles. This paper presents an overview of the research carried out by the TERAFLUX partners and some preliminary results. Our platform comprises 1000+ general purpose cores per chip in order to properly explore the above challenges. An architectural template has been proposed and applications have been ported to the platform. Programming models, compilation tools, and reliability techniques have been developed. The evaluation is carried out by leveraging on modifications of the HP-Labs COTSon simulator.