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Conference Papers Year : 2004

Circuit Design by Refinement in EventB


We present the design of a synchronous hardware component from a purely functional description of its behaviour. Starting from an abstract specification of a linear system in eventB, a synthesizable pipelined implementation is developed. Formal refinement is used to prove each development step correct. Thus, at the end we achieve a fully proven hardware description and circuit, provided the circuit is correct.


Other [cs.OH]
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Dates and versions

inria-00100145 , version 1 (26-09-2006)


  • HAL Id : inria-00100145 , version 1


Stefan Hallerstede, Yann Zimmermann. Circuit Design by Refinement in EventB. Forum on Specification and Design Languages - FDL'04, Pierre Boulet, 2004, Lille, France, 13 p. ⟨inria-00100145⟩
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