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Reports Year : 1999

Using Parallel Computing to Reduce CPU Power

Abstract

In this paper, we analyze parallelism as an energy-saving technique for mobile terminal or on-board systems. We show that the expected gains are considerable. However, some natural constraints can appear when applying massively this idea. Therefore, we analyze this concept on a simple model in an environment where either the space for circuitry is restricted, or the total weight of the system, including energy sources, has to be minimized. It turns to give new types of CAD problems. Finally, we analyze fault tolerance issues and solutions in a satellite-like environment.

Domains

Other [cs.OH]
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Dates and versions

inria-00073056 , version 1 (24-05-2006)

Identifiers

  • HAL Id : inria-00073056 , version 1

Cite

Jérôme Galtier. Using Parallel Computing to Reduce CPU Power. RR-3621, INRIA. 1999. ⟨inria-00073056⟩
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